TX-0

Original 
sto	00 a|aaa|aaa|aaa|aaa|aaa	AC → (a)		a = address (16 bit)
add	01 a|aaa|aaa|aaa|aaa|aaa	(a) + AC → AC
trn	10 a|aaa|aaa|aaa|aaa|aaa	if AC negative: a → PC
opr	11 .|...|...|...|...|...	operate
  cll	11 1|...|...|...|...|...	clear AC left
  clr	11 .|1..|...|...|...|...	clear AC right
  ios	11 .|.10|xxx|...|...|...	IO stop			xxx = IO operation

  pen	11 .|...|...|..1|...|0..	light pen → AC0:1
  tac	11 .|...|...|..0|...|1..	TAC 1→ AC

  com	11 .|...|...|...|1..|...	complement
  amb	11 .|...|...|...|...|.01	AC → MBR
  tbr	11 .|...|...|...|...|.11	TBR 1→ MBR

  mbl	11 .|...|...|01.|...|...	MBR → LR
  lmb	11 .|...|...|...|...|.10	LR → MBR

  shr	11 .|...|...|10.|...|...	shift AC right
  cyr	11 .|...|...|11.|...|...	cycle AC right

  pad	11 .|...|...|...|.1.|...	partial add, AC ⊕ MBR → AC
  cry	11 .|...|...|...|..1|...	carry

  hlt	11 .|.11|...|...|...|...	halt
Until late 1960 
sto	00 0|..a|aaa|aaa|aaa|aaa	AC → (a)		a = address (13 bit)
slr	00 1|..a|aaa|aaa|aaa|aaa	LR → (a)
add	01 0|..a|aaa|aaa|aaa|aaa	(a) + AC → AC
llr	01 1|..a|aaa|aaa|aaa|aaa	(a) → LR
trn	10 0|..a|aaa|aaa|aaa|aaa	if AC negative: a → PC
tra	10 1|..a|aaa|aaa|aaa|aaa	a → PC
opr	11 .|...|...|...|...|...	operate
  cll	11 1|...|...|...|...|...	clear AC left
  clr	11 .|1..|...|...|...|...	clear AC right
  ios	11 .|.10|xxx|...|...|...	IO stop			xxx = IO operation

  pen	11 .|...|...|..1|...|0..	light pen → AC0:1
  tac	11 .|...|...|..0|...|1..	TAC 1→ AC

  com	11 .|...|...|...|1..|...	complement AC
  amb	11 .|...|...|...|...|.01	AC → MBR
  tbr	11 .|...|...|...|...|.11	TBR 1→ MBR

  mbl	11 .|...|...|01.|...|...	MBR → LR
  lmb	11 .|...|...|...|...|.10	LR → MBR
  orl	11 .|...|...|001|...|1..	MBR 1→ LR
  anl	11 .|...|...|011|...|1..	MBR 0→ LR

  shr	11 .|...|...|10.|...|...	shift AC right
  cyr	11 .|...|...|11.|...|...	cycle AC right
  pad	11 .|...|...|...|.1.|...	partial add, AC ⊕ MBR → AC

  cry	11 .|...|...|...|..1|...	carry

  hlt	11 .|.11|...|...|...|...	halt
By 1962 
sto	00 0|00a|aaa|aaa|aaa|aaa	AC → (a)		a = address (13 bit)
stx	00 0|01a|aaa|aaa|aaa|aaa	AC → (a+XR)
sxa	00 0|10a|aaa|aaa|aaa|aaa	XR → (a) (bottom 13 bits)
ado	00 0|11a|aaa|aaa|aaa|aaa	(a) + 1 → AC,(a)
slr	00 1|00a|aaa|aaa|aaa|aaa	LR → (a)
slx	00 1|01a|aaa|aaa|aaa|aaa	LR → (a+XR)
stz	00 1|10a|aaa|aaa|aaa|aaa	0 → (a)
	00 1|11a|aaa|aaa|aaa|aaa
add	01 0|00a|aaa|aaa|aaa|aaa	(a) + AC → AC
adx	01 0|01a|aaa|aaa|aaa|aaa	(a+XR) + AC → AC
ldx	01 0|10a|aaa|aaa|aaa|aaa	(a) → XR
aux	01 0|11a|aaa|aaa|aaa|aaa	(a) + XR → XR
llr	01 1|00a|aaa|aaa|aaa|aaa	(a) → LR
llx	01 1|01a|aaa|aaa|aaa|aaa	(a+XR) → LR
lda	01 1|10a|aaa|aaa|aaa|aaa	(a) → AC
lax	01 1|11a|aaa|aaa|aaa|aaa	(a+XR) → AC
trn	10 0|00a|aaa|aaa|aaa|aaa	if AC negative: a → PC
tze	10 0|01a|aaa|aaa|aaa|aaa	if AC ±0: a → PC
tsx	10 0|10a|aaa|aaa|aaa|aaa	PC → XR; a → PC
tix	10 0|11a|aaa|aaa|aaa|aaa	if XR < -0: XR+1 → XR; a → PC
					if XR > +0: XR-1 → XR; a → PC
tra	10 1|00a|aaa|aaa|aaa|aaa	a → PC
trx	10 1|01a|aaa|aaa|aaa|aaa	a+XR → PC
tlv	10 1|10a|aaa|aaa|aaa|aaa	ext. level = 0V: a → PC
opr	11 .|...|...|...|...|...	operate
  amb	11 .|1..|...|...|...|...	AC → MBR

  cla	11 1|...|...|...|...|...	clear AC

  ios	11 .|.xx|xxx|...|...|...	IO stop                 xxxxx = IO operation

  xmb	11 .|...|...|0.1|...|...	XR → MBR
  com	11 .|...|...|...|1..|...	complement AC

  orb	11 .|...|...|...|...|101	AC 1→ MBR
  anb	11 .|...|...|...|...|111	AC 0→ MBR

  mbl	11 .|...|...|01.|...|...	MBR → LR
  lmb	11 .|...|...|...|...|01.	LR → MBR

  pad	11 .|...|...|...|.1.|...	partial add, AC ⊕ MBR → AC
  shr	11 .|...|...|100|...|...	shift AC right

  cyr	11 .|...|...|110|...|...	cycle AC right

  cry	11 .|...|...|...|..1|...	carry

  mbx	11 .|...|...|...|...|0.1	MBR → XR
Instruction set evolution